Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2001-01-26
2004-03-02
Dildine, R. Stephen (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06701473
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to an electrical circuit having circuit components that are connected through a bus where at least one of the circuit components can be tested independently of the other circuit components. Additionally, the present invention relates to a method for testing a circuit component that is connected to other circuit components through a bus, where the circuit component that is to be tested, can be tested independently of the other circuit components.
The circuit component that is to be tested is, by way of example, a so-called macro of an integrated circuit. When testing an integrated circuit, particular macros need or are intended to be tested individually, i.e. independently of the other circuit components of the integrated circuit.
Although only a relatively small part of the integrated circuit is tested during such tests, such tests are frequently relatively complex, particularly on account of the very high currents that can flow through the integrated circuit during testing, and on account of the associated extreme evolution of heat. For the aforementioned reasons, unreliable test results are sometimes also obtained.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide an electrical circuit having circuit components that are connected through a bus and a method of testing at least one of the circuit components independently of the other circuit components which overcomes the above-mentioned disadvantageous of the prior art electrical circuits and methods of this general type, and in which the circuit components that are to be tested, can be reliably tested with a minimum amount of effort.
With the foregoing and other objects in view there is provided, in accordance with the invention an electrical circuit that includes a bus; and a plurality of circuit components which are connected via the bus. At least one of the plurality of circuit components defines a circuit component to be tested and is configured to be tested independently from all others of the plurality of circuit components. The circuit component to be tested is configured to perform an operation, during the testing thereof, that is selected from the group consisting of outputting no data to the bus, and outputting data to the bus that is other than data which would be output to the bus during normal operation.
With the foregoing and other objects in view there is also provided, in accordance with the invention, a method for testing a circuit component which is connected to other circuit components via a bus. The method includes a step of providing a plurality of circuit components that are connected to a bus. At least one of the plurality of circuit components is configured such that it can be tested independently from all others of the plurality of circuit components, where the at least one of the plurality of circuit components defines a circuit component to be tested. While testing the circuit component to be tested, an operation is performed, with the circuit component to be tested. The operation is selected from the group consisting of outputting no data to the bus, and outputting data to the bus that is other than data which would be output to the bus during normal operation.
Accordingly, the electrical circuit and the method are distinguished
in that, during testing, the at least one circuit component which can be tested independently of the other circuit components outputs no data to the bus and/or, instead of the data which would need to be output to the bus during normal operation, outputs other data to the bus (characterizing part of patent claim
1
), and
in that steps are taken to ensure that, during testing, the circuit component which is to be tested outputs no data to the bus and/or, instead of the data which would need to be output to the bus during normal operation, outputs other data to the bus (characterizing part of patent claim
2
).
By providing these features it is possible to ensure that the output drivers of the circuit component which is to be tested do not consume any power at all or only very little power. This is plausible for the case in which the circuit component which is to be tested outputs no data to the bus, but also applies to the case in which data are output to the bus. This is because the data which, if at all, are output to the bus by the circuit component which is tested, while it is being tested, are not the data which would be output to the bus by the tested circuit component during normal operation. The data can therefore be selected and output such that the power consumption of the output drivers is minimal.
The output drivers have a low power consumption when, amongst other things, the data which are to be output to the bus do not change or change only infrequently. The reason for this is that, in this case, the bus lines, which can have a considerable capacity and which may require relatively high currents for reloading them, particularly at high clock frequencies, need not be reloaded or need be reloaded only infrequently. Reloading of the bus lines, which is necessary infrequently or is not necessary at all, has the positive effect that the output drivers need never or need only infrequently deliver high currents. The effect achieved by this, in turn, is that, during testing, the relevant circuit component does not become nearly as hot as would be the case without the inventive measures regarding the absence of output data or the limitation on the output data.
A low power consumption by the output drivers and the associated advantages can also be achieved by providing, additionally or alternatively, for the data which need to be output to the bus to be able to be output so as to bypass the output drivers during testing. The output drivers can then be switched off or deactivated during testing.
The fact that, while it is being tested, the tested circuit component does not output data to the bus, and/or that it outputs data other than data which is output in the normal case, does not affect the test result. The circuit component which is to be tested is, of course, intended to be tested independently of the other circuit components, which means that it is not necessary for data interchange between the circuit components of the electrical circuit to take place via the bus.
The electrical circuit and the method therefore make it possible for circuit components, which are to be tested, to be reliably tested with a minimum amount of effort.
In accordance with an added feature of the invention, the circuit component to be tested includes output drivers for outputting data to the bus, the output drivers being deactivated during testing of the circuit component to be tested.
In accordance with an additional feature of the invention, the output drivers are deactivated by a test unit which is testing the circuit component to be tested.
In accordance with an another feature of the invention, a device is provided that is selected from the group consisting of a logic unit and a selection circuit. The device is for deactivating the output drivers. The device ensures: that during normal operation of the circuit component to be tested, the output drivers are controlled based upon an enable signal which is supplied to the circuit component to be tested by a bus control device which controls the bus, and that during testing of the circuit component to be tested, the output drivers are controlled based upon a test control signal which the test unit supplies to the circuit component to be tested.
In accordance with a further feature of the invention, the device is the logic unit, and the logic unit provides an output signal resulting from a logical combination of the enable signal and a test control signal.
In accordance with a further added feature of the invention, the device is selected to be the selection circuit, the output drivers include control connections, and the selection circuit is formed by a multiplexer which selectively connects the enable signal or the test cont
Nygren Aaron
Plättner Eckehard
Täuber Andreas
Dildine R. Stephen
Greenberg Laurence A.
Locher Ralph E.
Stemer Werner H.
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