Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-11-29
2008-10-07
Louis-Jacques, Jacques (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000
Reexamination Certificate
active
07434127
ABSTRACT:
An eFuse data alignment verification apparatus and method are provided. Alignment latches are provided in a series of latch units of a write scan chain and a logic unit is coupled to the alignment latches. A sequence of data that is scanned-into the series of latch units of the write scan chain preferably includes alignment data values. These alignment data values are placed in positions within the sequence of data that, if the sequence of data is properly scanned-into the series of latch units, cause the data values to be stored in the alignment latches. The logic unit receives data signals from the alignment latches and determines if the proper pattern of data values is stored in the alignment latches. If the proper pattern of data values is present in the alignment latches, then the data is aligned and a program enable signal is sent to the bank of eFuses.
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Gandhi Dipakkumar
International Business Machines - Corporation
Louis-Jacques Jacques
Rifai D'Ann N.
Walder, Jr. Stephen J.
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