Static information storage and retrieval – Read/write circuit – Precharge
Reexamination Certificate
2009-06-22
2011-10-18
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Precharge
C365S210100
Reexamination Certificate
active
08040746
ABSTRACT:
A memory device for efficient word line, bit line and precharge tracking is provided. The memory device includes a memory array, one or more address decoders, a word line driver, a plurality of sense amplifiers, a reference word line column, a reference bit line column, and a control circuit. The control circuit generates a control signal to perform read and write operations on the memory device. The address decoder selects a bit line and a word line. The selected word line is activated by the word line driver. While the reference word line column is used for vertical tracking of the word line, the reference bit line column is used for vertical tracking of the bit line. The sense amplifiers are activated to read the bit line.
REFERENCES:
patent: 5432747 (1995-07-01), Fuller et al.
patent: 5745421 (1998-04-01), Pham et al.
patent: 6160746 (2000-12-01), Park et al.
patent: 6282131 (2001-08-01), Roy
patent: 6711092 (2004-03-01), Sabharwal
patent: 2009/0316464 (2009-12-01), Sharma et al.
Dwivedi Devesh
Jain Sanjeev Kumar
Bergere Charles
Freescale Semiconductor Inc.
Phung Anh
LandOfFree
Efficient word lines, bit line and precharge tracking in... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Efficient word lines, bit line and precharge tracking in..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Efficient word lines, bit line and precharge tracking in... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4254708