Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-07-01
1998-09-01
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711141, G06F 1200
Patent
active
058025634
ABSTRACT:
Memory space in the lower-level cache (LLC) of a computer system is allocated in cache-line sized units, while memory space in the higher-level cache (HLC) of the computer system is allocated in page sized units; with each page including two or more cache lines. Accordingly, during the execution of a program, cache-line-sized components of a page-sized block of data are incrementally stored in the cache lines of the LLCs. Subsequently, the system determines that it is time to review the allocation of cache resources, i.e., between the LLC and the HLC. The review trigger may be external to the processor, e.g., a timer interrupting the processor on a periodic basis. Alternatively, the review trigger may be from the LLC or the HLC, e.g., when the LLC is full, or when usage of the HLC drops below a certain percentage. A review of the allocation involves identifying components associated with their respective blocks of data and determining if the number of cached components identified with the blocks exceed a threshold. If the threshold is exceeded for cached components associated with a particular block, space is allocated in the HLC for storing components from the block. This scheme advantageously increases the likelihood of future cache hits by optimally using the HLC to store blocks of memory with a substantial number of uses components.
REFERENCES:
patent: 5136700 (1992-08-01), Thacker
patent: 5237673 (1993-08-01), Orbits et al.
patent: 5450563 (1995-09-01), Gregor
patent: 5535116 (1996-07-01), Gupta et al.
patent: 5537573 (1996-07-01), Ware et al.
patent: 5588138 (1996-12-01), Bai
patent: 5592671 (1997-01-01), Hiyayama
patent: 5634110 (1997-05-01), Laudon et al.
patent: 5640520 (1997-06-01), Tetrick
Hagersten Erik E.
Hill Mark D.
Kivlin B. Noel
Langjahr David
Sun Microsystems Inc.
Swann Tod R.
LandOfFree
Efficient storage of data in computer system with multiple cache does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Efficient storage of data in computer system with multiple cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Efficient storage of data in computer system with multiple cache will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-284509