Effectively differential, multiple input OR/NOR gate architectur

Details Effectively differential, multiple input OR/NOR gate architectur Effectively differential, multiple input OR/NOR gate architectur

1996-11-19

1999-08-31

Santamauro, Jon

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar transistor

326 18, H03K 19086

Patent

active

059458488

ABSTRACT:
A multiple input, low voltage, OR/NOR gate architecture based on a single-ended OR/NOR gate circuit, wherein a plurality of input transistors are connected in parallel. A reference transistor connects to the input transistors. A feedback means connects the NOR output signal to the base or gate of the reference transistor. The feedback means provides an effectively differential input for the multiple input circuit, without increasing circuit complexity, thereby providing enhanced noise margin characteristics.

REFERENCES:
patent: 4924116 (1990-05-01), Vu et al.
patent: 4972103 (1990-11-01), Barbu
patent: 5350950 (1994-09-01), Inaba et al.
patent: 5408145 (1995-04-01), Ali
patent: 5604456 (1997-02-01), Nitta

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