Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1998-05-22
2000-04-18
Nguyen, Viet Q.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365218, 36518901, 36518502, 36518529, G11C 700
Patent
active
06052314&
ABSTRACT:
An EEPROM device has an array of memory cells composed of nonvolatile data-storage elements that allow electrical writing and erasing of data. The array of memory cells is provided with an area for storing data representing the length of writing time for which the writing and erasing of data are performed. The writing-time data is read out from this area and held in a latch circuit. The latched data is used as the target count up to which a counter counts a clock. The counter starts counting in response to a start signal and stops counting when the actual count reaches the target count. The counter, while it is counting, outputs a high-level signal, which determines the length of writing time for which writing is performed in the memory cells.
REFERENCES:
patent: 5436913 (1995-07-01), Yamamura et al.
patent: 5650734 (1997-07-01), Chu et al.
patent: 5801989 (1998-09-01), Lee et al.
patent: 5807126 (1998-09-01), Bethurum
patent: 5818791 (1998-10-01), Tanaka et al.
patent: 5869980 (1999-02-01), Chu et al.
Nguyen Viet Q.
Rohm & Co., Ltd.
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