Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-07-26
2009-08-11
Menz, Douglas M (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S533000, C257S314000
Reexamination Certificate
active
07572700
ABSTRACT:
An EEPROM includes a substrate, a first semiconductor layer and a second semiconductor layer formed on the substrate. The first semiconductor layer is isolated from the second semiconductor layer by a trench. A first source and a first drain are located at two opposing sides of the first semiconductor layer. A first dielectric layer is formed on the first semiconductor layer, and a first floating gate is formed on the first dielectric layer. A second source and a second drain are located at two opposing sides of the second semiconductor layer. A second dielectric layer is formed on the second semiconductor layer, and a second floating gate is formed on the second dielectric layer. The first floating gate and the second floating gate are electrically connected.
REFERENCES:
patent: 5998830 (1999-12-01), Kwon
Chao Chih-Wei
Chen Chi-Wen
Hu Chin-Wei
Au Optronics Corp.
Menz Douglas M
Thomas Kayden Horstemeyer & Risley
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