EDRAM having a dynamically-sized cache memory and associated met

Details EDRAM having a dynamically-sized cache memory and associated met EDRAM having a dynamically-sized cache memory and associated met

1996-04-10

1999-11-09

Thai, Tuan V.

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

711 3, 711118, 711134, 711136, 711160, 36518905, G06F 1200, G06F 1206, G06F 1300

Patent

active

059833130

ABSTRACT:
The method and apparatus of the current invention relates to an intelligent cache management system for servicing a main memory and a cache. The cache resources are allocated to segments of main memory rows based on a simple or complex allocation process. The complex allocation performs a predictive function allocating scarce resources based on the probability of future use. The apparatus comprises a main memory coupled by a steering unit to a cache. The steering unit controls where in cache a given main memory row segment will be placed. The operation of the steering unit is controlled by an intelligent cache allocation unit. The unit allocates new memory access requests cache locations which are least frequently utilized. Since a given row segment may be placed anywhere in a cache row, the allocation unit performs the additional function of adjusting the column portion of a memory access request to compensate for the placement of the requested segment in the cache. The allocation unit accepts as input hit or miss information from page segment comparators greater than or equal to in number the number of segments of cache.

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