Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1995-05-26
1996-11-19
Chin, Wellington
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375373, H04L 700
Patent
active
055770789
ABSTRACT:
An edge detector has a digital phase locking loop in which one of the signals (e.g., the data signal) is coupled to a delay chain that develops a series of incrementally phase delayed versions of the input. Adjacent phase delayed pairs are selected, one pair at a time, and are compared to the other signal (e.g., the clock signal) to determine if an edge of the clock falls between the edges of the data signal in the selected phase pair, or falls outside the edges of the selected phase pair, on one side or the other thereof. If the clock edge falls outside the selected pair, a control signal selects another pair for comparison and the process is repeated until, for example, the data edges are aligned with the positive going edge of the clock. With a clock frequency equal to twice data frequency, the data can then be sampled on the falling edge of the clock.
REFERENCES:
patent: 4977582 (1990-12-01), Nichols
patent: 5313501 (1994-05-01), Thacker
Capowski Robert S.
Casper Daniel F.
Ferraiolo Frank D.
Jordan Richard C.
Laviola William C.
Augspurger Lynn L.
Chin Wellington
International Business Machines - Corporation
Luu Huong N.
Marhoefer Laurence J.
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