ECL EPROM with CMOS programming

Details ECL EPROM with CMOS programming ECL EPROM with CMOS programming

1988-12-21

1991-12-24

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365208, 3652256, 307495, G11C 700

Patent

active

050758853

ABSTRACT:
The present invention provides an ECL EPROM circuit which uses a MOS memory cell. The invention includes a technique for programming the memory cell using MOS voltage levels, and also includes circuitry for reading the memory cell at ECL voltage levels. Thus, the programming and reading paths are split to give the ease of programming and the reprogrammability of MOS EPROM devices combined with the reading speed of PROM devices using ECL voltage levels. In one embodiment, two parallel paths are provided to a memory cell to enable it to separately receive reading and writing (programming) signals. The reading path employs ECL components for reading the cell, while the writing path contains MOS components for programming and verifying the cell. The memory cell itself contains a MOS memory element, an ECL pass element, and a sense element coupling the MOS memory element to the ECL pass element. The MOS memory element is coupled to the programming (writing) path, and the ECL pass element is coupled to the read path with a bipolar output transistor.

REFERENCES:
patent: 4825413 (1989-04-01), Tran
patent: 4858183 (1989-08-01), Scharrer
patent: 4866673 (1989-09-01), Higuchi et al.
patent: 4879681 (1989-11-01), Miwa et al.
patent: 4924439 (1990-05-01), Ogiue et al.

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