Dynamically upgradeable disk array chassis and method for dynami

Details Dynamically upgradeable disk array chassis and method for dynami Dynamically upgradeable disk array chassis and method for dynami

1996-11-14

1999-03-30

Gossage, Glenn

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

711 4, 711 5, 711170, 395283, 395653, 39518205, G06F 1300, G06F 1120

Patent

active

058902147

ABSTRACT:
A dynamically upgradeable disk array chassis, and a method for dynamically upgrading a data storage system. The dynamically upgradeable disk array chassis includes a serial bus having a first bus for passing data in one direction and a second bus for passing data in the opposite direction. A shunt connects the first and second buses in a normal state. The shunt has a switched state in which each of the first and second buses is coupled to a separate output from the chassis. The chassis includes an environmental monitor connected to a communication path. Upon connecting a new disk array chassis to an active disk array chassis, the environmental monitor communicates through the communication path before switching the shunt to connect the serial bus with the serial bus of the new disk array chassis. The disk array chassis may include a diplexer for connecting the communication path to the separate outputs of the shunt and for combining the communication path signals with the serial path signals in one direction and for separating these signals in the other direction. The environmental monitor path communications and the serial bus communications can take place over a single twinax cable.

REFERENCES:
patent: 4677686 (1987-06-01), Hustig et al.
patent: 5390187 (1995-02-01), Stallmo
patent: 5564116 (1996-10-01), Arai et al.
"Ring datapath speeds 200-Mbytes/s transfers", Tom Williams, Computers & Subsystems, Computer Design, Aug. 1992, pp. 42, 44.

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