Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-01-03
2006-01-03
Padmanabhan, Mano (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S117000, C711S146000, C711S156000, C711S210000
Reexamination Certificate
active
06983347
ABSTRACT:
A method and system are disclosed for managing stored soft state information, such as the contents of cache memory and address translation information that are non-critical for executing a process within a processor. The soft states of idle processes are stored in system memory in virtual caches. Cache coherency of the soft states is maintained by snooping kill-type operations against the virtual caches in system memory.
REFERENCES:
patent: 6189112 (2001-02-01), Slegel et al.
patent: 6247109 (2001-06-01), Kleinsorge et al.
patent: 2002/0147889 (2002-10-01), Kruckemyer et al.
Arimilli Ravi Kumar
Cargnoni Robert Alan
Guthrie Guy Lynn
Starke William John
Dillon & Yudell LLP
International Business Machines - Corporation
Padmanabhan Mano
Rojas Midys
Salys Casimer K.
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