Dynamic type semiconductor memory device and operation...

Details Dynamic type semiconductor memory device and operation... Dynamic type semiconductor memory device and operation...

2011-01-11

2011-01-11

Auduong, Gene N (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S210100, C365S210120

Reexamination Certificate

active

07869292

ABSTRACT:
A dynamic type semiconductor memory device includes a sense amplifier connected with a bit line pair to amplify and sense a voltage difference on the bit line pair; a precharge circuit configured to precharge the bit line pair to a power supply voltage on a lower side in response to a first control signal; a memory cell capacitance having one end which is connected with the bit line pair through a first switch circuit which is controlled in response to a signal on a word line; and a reference cell capacitance having one end which is connected with the bit line pair through a second switch circuit which is controlled in response to a signal on a reference word line. The other end of the memory cell capacitance and the other end of the reference cell capacitance are electrically separated.

REFERENCES:
patent: 5889718 (1999-03-01), Kitamoto et al.
patent: 6272062 (2001-08-01), Mueller et al.
patent: 6714473 (2004-03-01), Fiscus
patent: 6788112 (2004-09-01), Chan et al.
patent: 11-026720 (1999-01-01), None
Barth et al., “A 300MHz Multi-Banked eDRAM Macro Featuring GND Sense, Bit-Line Twisting and Direct Reference Cell Write”, ISSCC 2002/ Session 9/ DRAM and Ferroelectric Memories/ 9.3, 2002 IEEE International Solid-State Circuits Conference.

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