Dynamic semiconductor memory device using sense amplifier as cac

Details Dynamic semiconductor memory device using sense amplifier as cac Dynamic semiconductor memory device using sense amplifier as cac

1996-12-23

1998-03-31

Le, Vu A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523003, 36523006, 365 63, G11C 800

Patent

active

057346143

ABSTRACT:
A DRAM includes a word driver unit, a subword driver block, a memory array block, a control circuit, a decode circuit, an equalize block, a sense amplifier block, and an I/O switch unit. A plurality of main word line run through the memory array block. A plurality subword lines are connected to each main word line. A division word line structure and an address non-multiplex method are applied in the DRAM. Therefore, the sense amplifier block can be used as a cache memory. The number of ways of the cache can be increased to improve the hit rate without increase in the chip area.

REFERENCES:
patent: 5406526 (1995-04-01), Shugibayashi et al.
patent: 5416748 (1995-05-01), Fujita
patent: 5446693 (1995-08-01), Okamoto

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