Static information storage and retrieval – Read/write circuit – Precharge
Patent
1992-12-08
1995-07-18
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Precharge
365202, 365205, 365207, 36518901, 327 52, G11C 700
Patent
active
054348218
ABSTRACT:
A dynamic random access memory, which comprises a substrate, a dynamic memory cell located on the substrate, a pair of bit lines to read out data from the cell and/or write data to the cell, a plurality of word lines, connected to the bit lines, to select a desired memory cell, a differential sense amplifier having an output line, the differential sense amplifier amplifying data from the pair of bit lines and transferring the amplified data to the output lines; means for precharging a first bit line of the pair of bit lines to a reference voltage and a second bit line of the pair of bit lines to a second voltage exceeding the reference voltage by the amount of an input offset voltage of the sense amplifier.
REFERENCES:
patent: 4547685 (1985-10-01), Wong
patent: 4954992 (1990-09-01), Kumanoya et al.
"Threshold Difference Compensated Sense Amplifer", S. Suzuki and M. Hirata, IEEE Journal of Solid-State Circuits, SC-14(6):1066-1069 (Dec. 1979).
"A New Sense Amplifier Technique For VLSI Dynamic Ram's", T. Furuyama, S. Saito and S. Fujii, IEDM Technical Digest, pp. 44-47, (1981).
Nakamura Nobuo
Watanabe Yohji
Kabushiki Kaisha Toshiba
Niranjan F.
Popek Joseph A.
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