Static information storage and retrieval – Read/write circuit – Precharge
Patent
1989-12-01
1991-05-28
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Precharge
365205, G11C 1300, G11C 1140
Patent
active
050200313
ABSTRACT:
P-type sense amplifier and N-type sense amplifier are connected to each of bit lines in a pair of bit lines respectively. N-channel MOS transistor is connected to each of the bit lines between the P-type sense amplifier and the N-type sense amplifier, and normally turned on. Each of a plurality of memory cells is connected to any of the bit lines at the side of the N-type sense amplifier from the transistor. The power source potential generated by the P-type sense amplifier is dropped by the threshold voltage of the transistor and supplied to one of the bit liens to which the memory cells are connected. The ground potential generated by the N-type sense amplifier is supplied without changing the potential to other of the bit lines. If the threshold value of the transistors to constitute the memory cells is made equal to the threshold voltage of the transistors on the bit lines, intermediate potential between the potential as "H" level held in the memory cells and the potential as "L" level becomes equal to the precharge potential of the bit lines, thereby unbalance of the read-out voltages can be eliminated.
REFERENCES:
patent: 4953129 (1990-08-01), Kobayashi et al.
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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