Dynamic read-write random access memory

Details Dynamic read-write random access memory Dynamic read-write random access memory

1978-02-10

1980-05-20

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Precharge

365182, 307238, G11C 1140

Patent

active

042042771

ABSTRACT:
A dynamic read-write random access memory utilizing metal oxide semiconductor field effect transistors (abbreviated as "MOS FETs") which comprises a plurality of data lines which are charged with electric energy (electric charge) or from which electric energy is discharged according to the logic operation, and wherein the respective data lines are connected to memory cells each formed of one transistor and one capacitor, precharge transistors and enhancement type MOS transistors for prevention of an erroneous behavior of the random access memory; and the gates of the enhancement type MOS transistors for prevention of the erroneous behavior are impressed with such level of voltage as approximates the threshold voltage of the transistors in order to prevent the deviation .DELTA.V of the potential of the data lines from the referential power source potential V.sub.SS to the negative side.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3765003 (1973-10-01), Paivinen et al.
patent: 3774176 (1973-11-01), Stein et al.
patent: 3778783 (1973-12-01), Proebsting et al.
patent: 3778784 (1973-12-01), Karp et al.
patent: 3969706 (1976-07-01), Proebsting et al.

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