Dynamic random access memory word line boost technique employing

Details Dynamic random access memory word line boost technique employing Dynamic random access memory word line boost technique employing

1998-09-03

2000-04-25

Dinh, Son T.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365203, 36523006, G11C 700

Patent

active

060551925

ABSTRACT:
A word line boost-on-writes technique for a dynamic random access memory device in which the word lines are initially boosted upon opening of a page in the memory array and then again following each write command, or following a predetermined number of write cycles in the case of a burst write, in order that the precharge cycle can proceed without delay due to the boost operation. Each boost is applied for a limited duration so that the overall precharge time is not affected.

REFERENCES:
patent: 5455789 (1995-10-01), Nakamura et al.
patent: 5550775 (1996-08-01), Abe et al.
patent: 5673225 (1997-09-01), Jeong et al.
patent: 5841706 (1998-11-01), Umezaki et al.
patent: 5864508 (1999-01-01), Takashima et al.

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