Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1984-08-08
1987-02-03
Moffitt, James W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365222, G11C 700
Patent
active
046412816
ABSTRACT:
A dynamic random access memory that contains a memory cell array including a plurality of memory cells includes a pre-amplifier intended to amplify data which is read out from a memory cell accessed by an address signal; a main-amplifier intended to amplify the output of the pre-amplifier and output the amplified signal; and a driver circuit intended to output a driving signal for driving the main-amplifier, the driver circuit includes a first and a second transistor, wherein a drain of the first transistor is connected to a node corresponding to an output terminal of the driver circuit, with a source of the first transistor being earthed and with a gate thereof being connected to the drain of the second transistor, and wherein a gate of the second transistor is connected to the node with a source thereof being earthed.
REFERENCES:
patent: 4396845 (1983-08-01), Nakano
Arimoto Kazutami
Kobayashi Toshifumi
Mashiko Koichiro
Miyamoto Hiroshi
Morooka Yoshikazu
Mitsubishi Denki & Kabushiki Kaisha
Moffitt James W.
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