Dynamic random access memory devices and method of...

Details Dynamic random access memory devices and method of... Dynamic random access memory devices and method of...

2005-04-26

2005-04-26

Lam, David (Department: 2818)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S230060, C365S189050

Reexamination Certificate

active

06885603

ABSTRACT:
A Dynamic Random Access Memory (DRAM) device can include a DRAM cell array configured to be periodically refreshed and a refresh control circuit that is configured to issue an internal refresh command to the DRAM cell array to provide periodic refresh of the DRAM cell array. The refresh control circuit can further include a refresh information signal to external of the DRAM device before the internal refresh command is issued to the DRAM cell array.

REFERENCES:
patent: 6667933 (2003-12-01), Tomita

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