Dynamic random access memory device having a transfer circuit fo

Details Dynamic random access memory device having a transfer circuit fo Dynamic random access memory device having a transfer circuit fo

1993-02-01

1994-09-27

Yoo, Do Hyum

Static information storage and retrieval

Read/write circuit

Precharge

365190, 365207, G11C 1134

Patent

active

053512154

ABSTRACT:
A dynamic random access memory device has memory cells each implemented by a series combination of a switching transistor and a storage capacitor coupled between one of the bit lines of an associated bit line pair and an associated plate line, and an input node of an associated sense amplifier circuit is coupled with the one of the bit lines and blocked from the associated plate line; however, the other input node of the associated sense amplifier circuit is blocked from the other bit line and coupled with the associated plate line so that the storage capacitor can produce relatively large initial differential voltage between the input nodes of the associated sense amplifier circuit.

REFERENCES:
patent: 5029137 (1991-07-01), Hoshi
patent: 5058073 (1991-10-01), Cho et al.
patent: 5111434 (1992-05-01), Cho

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