Dynamic random access memory device and method of manufacturing

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257535, H01L 2968, H01L 2978, H01L 2702

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active

052182177

ABSTRACT:
Each memory cell of a dynamic random access memory comprises a semiconductor layer of a first conductivity type, one and the other impurity regions of a second conductivity type, a gate electrode, a capacitor impurity region of the first conductivity type, and a capacitor electrode. The semiconductor layer of the first conductivity type comprises a first surface and a second surface located opposite to the first surface. One and the other impurity regions are formed spaced apart from each other in the semiconductor layer so as to define a channel region with a channel surface being a part of the first surface of the semiconductor layer. The gate electrode is formed on the channel surface through a gate insulating film. The capacitor impurity region is formed opposing to the channel region, near the second surface of the semiconductor layer and having a concentration higher than that of the semiconductor layer. The capacitor electrode is formed on the capacitor impurity region through a dielectric film. Reduced surface area occupied by each memory cell comprising a field effect transistor and a capacitor enables miniaturization of the memory cell. Electric charges generated by the impact ionization phenomenon are stored in the capacitor, so that a power consumed in a writing operation of data can be reduced.

REFERENCES:
patent: 4112575 (1978-09-01), Fu et al.
patent: 4959709 (1990-09-01), Watanabe
patent: 4961165 (1990-10-01), Ema
Uniform Silicon p-n Junctions. II. "Ionization Rates for Electrons", A. G. Chynoweth, Journal of Applied Physics, vol. 31, No. 7 (Jul. 1960), pp. 1161-1165.

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