Dynamic random access memory

Details Dynamic random access memory Dynamic random access memory

2007-04-03

2008-08-05

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S302000, C257S296000, C257S774000, C257SE21278, C257SE21304, C257SE21646, C438S243000, C438S386000

Reexamination Certificate

active

07408215

ABSTRACT:
A DRAM structure on a silicon substrate has an active area, gate conductors, deep trench capacitors, and vertical transistors. The deep trench capacitors are formed at intersections of the active area and the gate conductors, and each deep trench capacitor is coupled electrically to the corresponding vertical transistor to form a memory cell. The transistor includes a gate, a source in a lateral side of the gate, and a drain in another lateral side of the gate The depth of the drain is different from the depth of the source.

REFERENCES:
patent: 6818515 (2004-11-01), Lee et al.
patent: 7087947 (2006-08-01), Lee et al.
patent: 2007/0228460 (2007-10-01), Che
patent: 2008/0032471 (2008-02-01), Kuo et al.

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