Semiconductor device having plural dram memory cells and a...

Details Semiconductor device having plural dram memory cells and a... Semiconductor device having plural dram memory cells and a...

2001-12-14

2008-08-05

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S300000, C257S296000, C257SE27048, C438S250000

Reexamination Certificate

active

07408218

ABSTRACT:
A memory cell capacitor (C3) of a DRAM is formed by use of a MIM capacitor which uses as its electrode a metal wiring line of the same layer (M3) as metal wiring lines within a logic circuit (LOGIC), thereby enabling reduction of process costs. Higher integration is achievable by forming the capacitor using a high dielectric constant material and disposing it above a wiring layer in which bit lines (BL) are formed. In addition, using 2T cells makes it possible to provide a sufficient signal amount even when letting them operate with a low voltage. By commonizing the processes for fabricating capacitors in analog (ANALOG) and memory (MEM), it is possible to realize a semiconductor integrated circuit with the logic, analog and memory mounted together on one chip at low costs.

REFERENCES:
patent: 4103342 (1978-07-01), Miersch et al.
patent: 4888733 (1989-12-01), Mobley
patent: 5184324 (1993-02-01), Ohta
patent: 5219779 (1993-06-01), Suzuki
patent: 5293563 (1994-03-01), Ohta
patent: 5329479 (1994-07-01), Ota et al.
patent: 5357460 (1994-10-01), Yusuki et al.
patent: 5571743 (1996-11-01), Henkels et al.
patent: 5751628 (1998-05-01), Hirano et al.
patent: 6075720 (2000-06-01), Leung et al.
patent: 6150689 (2000-11-01), Narui et al.
patent: 6154387 (2000-11-01), Takata
patent: 6353269 (2002-03-01), Huang
patent: 6483737 (2002-11-01), Takeuchi et al.
patent: 6529397 (2003-03-01), Takeda et al.
patent: 6603203 (2003-08-01), Amanuma
patent: 6674633 (2004-01-01), Sun et al.
patent: 6759720 (2004-07-01), Shinkawata
patent: 6794694 (2004-09-01), Diodato et al.
patent: 2001/0003665 (2001-06-01), Kim
patent: 2001/0032993 (2001-10-01), Tsugane et al.
patent: 52-94784 (1977-08-01), None
patent: 5-291534 (1993-11-01), None
patent: 11-251547 (1999-09-01), None
patent: 2001-338990 (2001-12-01), None
patent: 2003-264236 (2003-09-01), None
patent: WO97/15950 (1997-05-01), None
IEEE Spectrum, Apr. 1999.
IEEE VLSI Technology Short Course, 1999.
JSSC, 1989, pp. 1206-1212.
IBM Technical Disclosure, 1977, vol. 20, No. 7.

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