Dynamic random access memories and method for testing...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S200000, C365S201000

Reexamination Certificate

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07450458

ABSTRACT:
The present invention enables screening of the so-called variable retention time (VRT) failure, namely a retention failure occurring in a DRAM due to fluctuation of a data retention time like a random telegraph noise. A pause/refresh test for checking a data retention function is repeated at all memory cells of a chip so that memory cells at which the retention failure due to random fluctuation of the data retention capability over time may occur is subjected to screening.

REFERENCES:
patent: 5870348 (1999-02-01), Tomishima et al.
patent: 5909404 (1999-06-01), Schwarz
patent: 6272588 (2001-08-01), Johnston et al.
patent: 6697992 (2004-02-01), Ito et al.
P.J. Restle et al., “DRAM Variable Retention Time”, I.E.D.M. Technology Digest (1992), pp. 807-810.
D.S. Yaney et al., “A Meta-Stable Leakage Phenomenon in DRAM charge Storage—Variable Hold Time”, I.E.D.M. Technology Digest (1987), pp. 336-339.

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