Dynamic RAM with active pull-up circuit

Static information storage and retrieval – Read/write circuit – Precharge

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365149, 365205, 365210, G11C 1124

Patent

active

047363436

ABSTRACT:
44Gate potentials of transistors Q.sub.R0 and Q.sub.R1 provided in an active pull-up circuit APo are always controlled to be appropriate values by a clock signal .phi..sub.p. As a result, reverse flow of electric charge from a capacitor C.sub.R0 or C.sub.R1 to a bit line LB or BL can be prevented and unfavorable influence due to such reverse flow of electric charge can be avoided in operation of the active pull-up circuit APo.

REFERENCES:
patent: 4417329 (1983-11-01), Mezawa et al.
patent: 4503343 (1985-03-01), Ohuchi
patent: 4578781 (1986-03-01), Ogawa et al.
patent: 4601017 (1986-07-01), Mochizuki et al.
"A High Performance Sense Amplifier for a 5 V Dynamic RAM", J. J. Barnes et al., IEEE Journal of Solid-State Circuits, vol. SC-15, No. 5, Oct. 1980, pp. 831-839.

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