Dynamic pad size to reduce solder fatigue

Details Dynamic pad size to reduce solder fatigue Dynamic pad size to reduce solder fatigue

2011-08-30

2011-08-30

Nguyen, Ha Tran T (Department: 2829)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

C257SE23020, C257SE23037, C257SE23038, C257S459000, C257S777000, C257S778000, C257S779000, C257S780000, C257S737000, C257S738000, C438S108000, C438S455000, C438S612000, C438S613000, C438S614000, C438S615000, C438S616000, C438S617000

Reexamination Certificate

active

08008786

ABSTRACT:
A semiconductor device is provided which comprises a substrate (501) having a plurality of bond pads (503) disposed thereon. Each bond pad has a major axis and a minor axis in a direction parallel to the substrate, and the ratio of the major axis to the minor axis increases with the distance of a bond pad from the center of the substrate.

REFERENCES:
patent: 5404047 (1995-04-01), Rostoker et al.
patent: 5880987 (1999-03-01), Merritt
patent: 6268568 (2001-07-01), Kim
patent: 6625048 (2003-09-01), Adedifard
patent: 6678948 (2004-01-01), Benzler et al.
patent: 2005/0012213 (2005-01-01), Imaoka
patent: 2005/0269710 (2005-12-01), Lee et al.
patent: 2006/0121718 (2006-06-01), Machida et al.

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