Dynamic memory with improved arrangement for precharging bit lin

Details Dynamic memory with improved arrangement for precharging bit lin Dynamic memory with improved arrangement for precharging bit lin

1986-01-30

1988-03-22

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Precharge

365205, G11C 700

Patent

active

047333731

ABSTRACT:
A dynamic memory which can accurately precharge a pair of bit lines to a potential equal to half the power supply voltage and which has improved detection characteristics is disclosed. The dynamic memory is of the type in which a precharge potential of a pair of bit lines is generated by short-circuiting the pair of bit lines after the pair of bit lines are discriminated into the power supply voltage and the reference voltage (ground). A compensation capacitor is provided for the pair of bit lines. The compensation capacitor is charged to the power supply voltage and the charged compensation capacitor is operatively connected to the pair of bit lines when they are short-circuited to thereby raise the potential on the bit lines to half the power supply voltage.

REFERENCES:
patent: 4601017 (1986-07-01), Mochizuki et al.
patent: 4608670 (1986-08-01), Duvvury et al.
patent: 4627033 (1986-12-01), Hyslop et al.
patent: 4638463 (1987-01-01), Rockett, Jr.

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