Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-02-03
2009-02-03
Ho, Hoai V (Department: 2827)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S014000, C365S229000
Reexamination Certificate
active
07486582
ABSTRACT:
A DRAM and its application to a mobile telephony circuit with a control circuit including a first refreshment controller controlled by a first clock signal and a second refreshment controller controlled by a second clock signal having a frequency less than that of the first one and used to synchronize events of the GSM network.
REFERENCES:
patent: 4313180 (1982-01-01), Mochizuki et al.
patent: 5313428 (1994-05-01), Inoue
patent: 5703823 (1997-12-01), Douse et al.
patent: 6323721 (2001-11-01), Proebsting
patent: 6542959 (2003-04-01), Tabo
patent: 2004/0148523 (2004-07-01), Lambert
patent: 2004/0202038 (2004-10-01), Li
Cofler Andrew
Druilhe François
Dutoit Denis
Eyzat Gilles
Freund Christian
Ho Hoai V
Jorgenson Lisa K.
Lappas Jason
Morris James H.
STMicroelectronics S.A.
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