Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1993-11-09
1995-05-09
Hille, Rolf
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257296, 257328, H01L 2910, H01L 2972
Patent
active
054142890
ABSTRACT:
A vertical transistor (10) has a substrate (12) and a control electrode conductive layer (18), which functions as a control or gate electrode. A sidewall dielectric layer (22) is formed laterally adjacent the control electrode conductive layer (18) and overlying the substrate (12). The conductive layer (18) at least partially surrounds a channel region (30). A vertical conductive region is formed within a device opening wherein a bottom portion of the conductive region is a first current electrode (28). A middle portion of the vertical conductive region is the channel region (30). A top portion of the vertical conductive region is a second current electrode (34).
REFERENCES:
patent: 4434433 (1984-02-01), Nishizawa et al.
patent: 4530149 (1985-07-01), Jastrzebski et al.
patent: 4663831 (1987-05-01), Birrittella et al.
patent: 4740826 (1988-04-01), Chatterjee
patent: 4764801 (1988-08-01), McLaughlin et al.
patent: 4849371 (1989-07-01), Hansen et al.
patent: 4860077 (1989-08-01), Reuss et al.
patent: 4894696 (1990-01-01), Takeda et al.
patent: 4902641 (1990-02-01), Koury, Jr.
patent: 4974060 (1990-11-01), Ogasawara
patent: 4984030 (1991-01-01), Sunami et al.
patent: 5057888 (1991-10-01), Fazan et al.
patent: 5061650 (1991-10-01), Dennison et al.
patent: 5066607 (1991-11-01), Banerjee
patent: 5072269 (1991-12-01), Hieda
patent: 5091761 (1992-02-01), Hiraiwa et al.
patent: 5096844 (1992-03-01), Konig et al.
patent: 5100823 (1992-03-01), Yamada
patent: 5100825 (1992-03-01), Fazan et al.
patent: 5106775 (1992-04-01), Kaga et al.
patent: 5106776 (1992-04-01), Shen et al.
patent: 5128273 (1992-07-01), Ema
patent: 5252849 (1993-10-01), Fitch et al.
"Impact of Surrounding Gate Transistor (SGT) for Ultra-High-Density LSI's", by Hiroshi Takato et al., was published in IEEE Trans. on Electron Devices, vol. 38, No. 3, Mar. 1991, pp. 573-577.
A Trench Transistor Cross-Point DRAM Cell, by W. F. Richardson et al., was published and presented at the IEEE IEDM Conference 1985, pp. 714-717.
Fitch Jon T.
Mazure Carlos A.
Witek Keith E.
Hardy David B.
Hille Rolf
Motorola Inc.
Witek Keith E.
LandOfFree
Dynamic memory device having a vertical transistor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic memory device having a vertical transistor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic memory device having a vertical transistor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1708129