Dynamic memory circuit with improved noise-prevention circuit ar

Details Dynamic memory circuit with improved noise-prevention circuit ar Dynamic memory circuit with improved noise-prevention circuit ar

1983-10-28

1986-09-02

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Noise suppression

365230, G11C 1140, G11C 1300

Patent

active

046100024

ABSTRACT:
A memory circuit provided with improved noise-prevention circuit arrangement for word lines is disclosed. The memory circuit is structured in such a manner that each word decoder is provided for each word line group including a plurality of word lines for selecting the associated word line group, and a noise-prevention circuit of a flip flop type is provided for each of the work decoder for preventing an output of the word decoder from floating when that word decoder is not selected.

REFERENCES:
patent: 4409678 (1983-10-01), Takemae et al.

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