Dynamic memory cell

Details Dynamic memory cell Dynamic memory cell

1982-09-16

1983-11-01

Richardson, Robert L.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

3072383, 365222, G11C 1124, G11C 1140, G11C 700

Patent

active

044133294

ABSTRACT:
A dynamic memory cell is disclosed which provides means for rewriting the cell after reading without discharging the bit line driver to thereby improve cycle time. The cell includes an independently operated device to access the capacitive storage node to discharge the node of any charge thereon after the reading of a low or no charge bit on the capacitive storage node.

REFERENCES:
patent: 3387286 (1968-06-01), Dennard
patent: 3949382 (1976-04-01), Yasui
patent: 4061954 (1977-12-01), Proebsting
patent: 4136292 (1979-01-01), Suzuki
patent: 4162416 (1979-07-01), Beecham
patent: 4203159 (1980-05-01), Wanlass
patent: 4292677 (1981-09-01), Bell
patent: 4351034 (1982-09-01), Eaton, Jr. et al.
L. M. Arzubi, IBM Technical Disclosure Bulletin, Aug. 1975, vol. 18, No. 3, pp. 649 & 650, "Two-Device Storage Cell".
L. M. Arzubi, IBM Technical Disclosure Bulletin, Jul. 1976, vol. 19, No. 2, pp. 407 & 408, "Sense Amplifier for Capacitive Storage".

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