Dynamic level converter of a semiconductor memory device

Details Dynamic level converter of a semiconductor memory device Dynamic level converter of a semiconductor memory device

1996-05-24

1997-12-16

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Including level shift or pull-up circuit

365205, G11C 700

Patent

active

056993048

ABSTRACT:
A level converter for use in a semiconductor memory device includes a level converting unit, a latch circuit and a blocking circuit. The level converting unit receives sensed first and second sensing voltages and a control clock and which provides level-converted first and second output voltages in correspondence with the first and second sensing voltage at first and second output nodes in response to the control clock. The latch circuit boosts a difference between the first and second output voltages provided at the first and second output nodes to be substantially equal to the level of a supply voltage in response to the application of the supply voltage. The blocking circuit controls the application of the supply voltage to the level converting unit and the latch circuit according to the control clock, in order to reduce current consumption due to the application of the supply voltage and to achieve a high operating speed.

REFERENCES:
patent: 4716320 (1987-12-01), McAdams
patent: 5041746 (1991-08-01), Webster et al.
patent: 5577000 (1996-11-01), Asami

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