Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2000-12-29
2002-07-16
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S087000, C326S026000
Reexamination Certificate
active
06420899
ABSTRACT:
FIELD OF THE INVENTION
Embodiments of the present invention relate to a dynamic impedance matched driver which gives improved slew rate and glitch termination.
BACKGROUND OF THE INVENTION
As system performance has increased, associated input and output delays have decreased. Recent high-speed requirements have forced output buffer designers to push buffer impedance much lower than the transmission line impedance they are driving in order to meet timings. This is due to the far end receiver requiring the received signal to be driven to valid Vil and Vih limits with multiple loads within a single time of flight. Multiple loads often result in parallel transmission lines and reduced transmission line impedance where the transmitted signal energy is shared among each path.
Drivers must maintain a close impedance match to the minimum transmission line impedance during switching. These lines may be parallel transmission lines and loads. This allows for the switching to occur with only one flight time delay. However, when reflections are received at the driver, an unmatched near end termination will result in a negative wave propagation back down the line. A matched impedance at the driver or near end will terminate incident waves because the reflection coefficient is zero or near zero.
For quiet lines, simultaneous switching noise can propagate from the buffer's power supply rails, through the quiet buffer, and onto the transmission line. As the driver impedance becomes less than the line impedance, the energy transferred onto the transmission line increases. But practical circuit board and package design usually induces crosstalk and power-delivery noise onto the signal lines, which we will call simultaneous switching output (SSO) noise.
A need, therefore, exists for an improved termination arrange reduces or addresses these problems.
REFERENCES:
patent: 5528166 (1996-06-01), Iikahar
patent: 5898321 (1999-04-01), Likbahar et al.
patent: 5963047 (1999-10-01), Kwong et al.
patent: 6242942 (2001-06-01), Shamarao
patent: 6297677 (2001-10-01), Ang et al.
patent: WO 99/06845 (1999-11-01), None
Crittenden Brent S.
Maloney Timothy J.
Volk Andrew M.
Intel Corporation
Tokar Michael
Tran Ahn Q.
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