Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2011-04-26
2011-04-26
Le, Don P (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S046000, C326S112000
Reexamination Certificate
active
07932750
ABSTRACT:
A dynamic domino circuit includes a clock generator and a domino circuit. The clock generator generates a pulse signal and a plurality of internal clock signals based on a global clock signal. Phases of the plurality of internal clock signals are sequentially delayed. The domino circuit sequentially performs a plurality of logic operations based on a plurality of input signals, the pulse signal and the plurality of internal clock signals and generates an output signal in synchronization with the pulse signal. The dynamic domino circuit may provide an effective interface with static logics.
REFERENCES:
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patent: 5983013 (1999-11-01), Rogers et al.
patent: 6018254 (2000-01-01), Rogers et al.
patent: 2001-244806 (2001-09-01), None
patent: 2006-253242 (2006-09-01), None
patent: 10-0293261 (2001-04-01), None
Le Don P
Samsung Electronics Co,. Ltd.
Stanzione & Kim LLP
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