Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2003-04-04
2004-05-04
Niebling, John (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S709000, C029S025010, C118S725000
Reexamination Certificate
active
06730604
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to automated processing of semiconductor wafers using split runcards for selecting alternate processing steps, and more specifically to providing dynamic contamination control of processing equipment when using split runcards.
BACKGROUND
Modem semiconductor fabrication facilities (often referred to as FABs) typically use MES (manufacturing execution system) to control “Lot” flow equipment operations and proper conditions to achieve fully automated operations. One successful MES solution is the SiView standard system produced by IBM which supports the integration of an AMHS (Automated Material Handling System) and supports use of 300 mm FOUPs (Front Opening Unified Pods) while also maintaining support of a 200 mm carrier system.
A unified pod for processing wafers carefully maintains the purity of a small inside space of the unified pod. Because the purity of the small inside space of the pod is controlled, the purity of the clean room is less critical. Thus, the use of a unified pod saves wafer manufacturing equipment cleaning costs. However, external dust or human body dust may be carried into the manufacturing equipment when opening the cover of the typical unified pod, and thereby contaminate the wafers. A FOUP (Front Open Unified Pod) auto loading structure is suitable for use in the loading-in-interface in a wafer manufacturing process to automatically close/open the cover of a FOUP and thereby help avoid this type of contamination. The FOUP includes a machine base, a carriage, a sliding control mechanism, a clamping mechanism, a horizontal shifting mechanism and a lifting mechanism. The FOUP is put on the carriage and held down by the clamping mechanism. It is then moved in contact with a gate on an axis on a backboard of the machine base. A cover of the FOUP is then opened by a cover close/open control mechanism at the back of the gate. The cover is then carried backward away from the FOUP by the horizontal shifting mechanism and then lowered with the lifting mechanism. The cover is closed on the FOUP when reversing the procedure. The automatic FOUP cover closing/opening operation helps prevent wafer contamination.
The SiView standard system conforms to industry standards and allows for a high degree of changes and inter-operability, R&D experiments, STR (special test report) requests, tuning of equipment recipes, etc. Changes in the type, order or parameters of the automated processes for such experiments and STR requests are typically initiated by a “list of new processes,” changes in the order of processing, or process parameters which are changed to or in addition to an existing or defined automatic process. This list is often referred to as a “Runcard,” or more specifically as a “Split” Runcard. However, such changes as specified by a “Split” Runcard cannot be automatically handled or tracked by the system. Consequently, until the present invention it was necessary that FAB operators manually assign the equipment ID required by a recipe and use a manual mode to process a “Lot” of wafers according to a Split Runcard that deviated from the pre-defined semiconductor processes carried out automatically by an IBM SiView standard system.
A typical SiView standard system used to manufacture semiconductors requires that the contamination level of the “Lot” of wafers, the equipment used to process the Lot and the FOUP be designated or flagged. Further, unless all three of the wafer Lots, the processing equipment and the FOUP are all at the same contamination level and carry the correct flag or indica, the wafer Lot and process equipment cannot be loaded or “tracked” into the FOUP for processing.
As will be appreciated by those skilled in the art, according to the prior art a manufacturing or process run on a “Lot” of wafers always followed a predefined series of processes and used the same items of process equipment. Consequently, once the contamination status was correctly mapped through the process equipment and the process was proven successful and “signed off” a simple contamination check or comparison check of the equipment, wafer Lot and FOUP was sufficient to prevent the occasional contamination mismatch error. As will also be appreciated and as discussed above, the use of a Split Runcard to change recipes, process equipment or the order of processing was accomplished by manual intervention by the FAB operator. Therefore, if the equipment required by a Split Runcard was not the same as the equipment required by the predefined sequence of processes, the MM server would simply reject the “operation start” request and the FAB operator would evaluate the situation and make the necessary corrections or changes. Thus, contamination level compatibility between wafer Lot, processing equipment and FOUP was one of the many items managed manually by the FAB operator. Of course, a great deal of time could be lost in correcting the contamination level compatibility problem or expensive cleanup procedures could be required if the problem was not corrected prior to tracking in of equipment and wafers into a FOUP
Therefore, if Split Runcard operations are to avoid contamination control problems it is also necessary that contamination monitoring and control of alternate or changed processes also be evaluated automatically before the start of an operation or process run and that contamination levels of the wafer Lot be dynamically changed when appropriate or different processing equipment and FOUP's be selected.
SUMMARY OF THE INVENTION
These and other problems are generally solved or circumvented, and technical advantages are generally achieved, by preferred embodiments of the present invention as discussed below.
A method for maintaining compatible contamination levels between wafers being processed and the processing equipment during an automated manufacturing run controlled by an MES (manufacturing execution system) and a Split Runcard is provided by this invention. The method comprises establishing a predefined or first sequence of steps which include a plurality of different processes for manufacturing semiconductors. A specific process which will be a reference process for a split condition is identified. A second sequence of steps which includes one or more processes as identified by a Split Runcard is also provided. Each item of equipment associated with the first sequence of steps and second sequence of steps will carry indica indicating a contamination level. The processing of a full “Lot” of wafers according to the first sequence of steps is then started, and the contamination level of the full Lot of wafers is continually evaluated and determined during this processing.
Processing of the full Lot of wafers is then interrupted prior to execution of the specific or identified process in the first sequence of steps. The full Lot of wafers are then divided into a first group of wafers and a second group of wafers and both the first group and second group now have the same contamination level designation. The first group of wafers is then further processed according to the second sequence of steps and the contamination level of the first group of wafers will be set to a contamination level as determined by the executed process of the second sequence of steps. Upon completing processing according to the second sequence of steps, the first group of wafers is combined or merged with the second group of wafers, and the contamination level of both combined groups is set to the highest contamination level of the two groups. It will be appreciated of course that prior to the first and second group of wafers merging the second group of wafers may be further processed according to one or more processes included in the first sequence of steps. It should also be appreciated that after the two groups of wafers have been merged or combined, processing of the combined group may continue according to the first sequence of steps or processes.
The foregoing has outlined rather broadly the features and technical advantages of the pre
Chen I-Chun
Chou Tse An
Gong Hao Ming
Hsu Hsien Jung
Jann Larry
Niebling John
Slater & Matsil L.L.P.
Stevenson Andre′ C.
Taiwan Semiconductor Manufacturing Company , Ltd.
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