Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent
1998-07-29
2000-12-26
De Cady, Albert
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
714785, H03M 1300
Patent
active
061675512
ABSTRACT:
An embedded DRAM is incorporated inside a digital-versatile-disk (DVD) playback-controller integrated circuit. Data from the DVD optical disk is written to a data block in the embedded DRAM. Error correction is performed by reading the data block to generate syndromes and over-writing errors in the data block with corrections. Once the data block is corrected, it is copied or moved to a different area of the embedded memory, a host-buffer area. As the data block is moved, de-scrambling is performed to decrypt the data. The re-ordered data is stripped of overhead such as ECC bytes and written to the host-buffer area of the embedded DRAM. A checksum is generated as the data is moved, and the checksum is compared to a stored checksum to ensure that all errors were corrected. The data block in the host-buffer area is then transferred to a host. The embedded DRAM has a very wide data-access width of 16 bytes. The full width is used for writing data from the optical disk to the ECC data block buffer, and for reading data from the host-buffer area to the host. Narrower access widths are used by the error correction and de-scrambler blocks.
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Ho Son Hong
Nguyen Hung Cao
Auvinen Stuart T.
Cady Albert De
NeoMagic Corp.
Ton David
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