Dummy-cell circuitry for dynamic read/write memory

Details Dummy-cell circuitry for dynamic read/write memory Dummy-cell circuitry for dynamic read/write memory

1984-07-26

1985-10-15

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Precharge

365210, G11C 700

Patent

active

045478686

ABSTRACT:
A semiconductor dynamic read/write memory circuit using one-transistor storage cells and balanced bit lines with differential sense amplifiers employs dummy capacitors which are the same size as the storage capacitors. The dummy cell produces a signal on the bit line half that of the storage cell due to a level-shift circuitry connected to the dummy cells. The dummy capacitor is precharged to a reference voltage, and at the beginning of an active cycle the dummy capacitor is charge-shared with another capacitance of the same size, to change the reference level. The net signal is thus equal to that of a capacitor one-half the size of the storage capacitors.

REFERENCES:
patent: 4262342 (1981-04-01), Tuan
patent: 4503343 (1985-03-01), Ohuchi

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