Dual site loadboard tester

Details Dual site loadboard tester Dual site loadboard tester

1997-05-27

1999-10-19

Chung, Phung M.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

H04B 1700

Patent

active

059681934

ABSTRACT:
A method and apparatus for testing integrated circuit devices includes a dual site loadboard (60) with dual test sites (62) for holding integrated circuit devices. The dual test sites are connected to test instruments. Integrated circuit devices are loaded onto the dual test sites and tested one at a time using the same set of pin cards (34) in a test head (30).

REFERENCES:
patent: 5172377 (1992-12-01), Robinson et al.

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