Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1987-12-18
1989-04-18
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365230, 365221, 364900, G11C 700, G11C 800, G06F 100
Patent
active
048233218
ABSTRACT:
In a dual port type semiconductor memory device (FIFO), a register is provided between a read side of a memory cell array and a data output. When data is read from the memory cell array to the data output, a content stored in the memory cell array is transmitted in advance by a preceding read instruction clock to the register, thereby enhancing the read operation speed.
REFERENCES:
patent: 4138732 (1979-02-01), Suzuki et al.
patent: 4433394 (1984-02-01), Torii et al.
Fears Terrell W.
Fujitsu Limited
Koval Melissa J.
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