Dual port SRAM memory

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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Details

C365S185130, C365S189190, C365S189040

Reexamination Certificate

active

07057963

ABSTRACT:
The layout structure of a dual port SRAM (Static Random Access Memory) includes a read bit line adjacently positioned to a complementary read bit line, and a write bit line positioned adjacent to a complementary write bit line, to provide a shield between the read and write lines for preventing cross-talk caused during read and write operations.

REFERENCES:
patent: 6084820 (2000-07-01), Raszka
patent: 6606276 (2003-08-01), Yamauchi et al.
patent: 6731566 (2004-05-01), Sywyk et al.
patent: 6829156 (2004-12-01), Marr

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