Dual port random access memory storage cell

Details Dual port random access memory storage cell Dual port random access memory storage cell

1976-11-26

1978-11-14

Konick, Bernard

Static information storage and retrieval

Read/write circuit

For complementary information

307238, 307317A, 365195, G11C 700, G11C 1140

Patent

active

041258770

ABSTRACT:
A dual port memory cell suitable for use in emitter coupled logic applications is accessible from two different address ports. The dual port storage cell includes first and second cross coupled cells, each including a selection conductor and a pair of diodes coupled to the cross coupled transistors to effect selection of that storage cell. The base of each of the cross coupled transistors of the first storage cell is coupled to the base of a coupling transistor, the emitter of which is connected to the base of a corresponding transistor of the other storage cell. Each dual port memory cell has two pairs of bit lines, one pair being coupled to the first storage cell and the other being coupled to the second storage cell. If one of the storage cells is selected, and the other remains unselected, the information in the selected cell is automatically written into the unselected storage cell.

REFERENCES:
patent: 2402758 (1946-06-01), Leverenz
patent: 3474248 (1969-10-01), Brown et al.
patent: 3573754 (1971-04-01), Merryman
patent: 3609665 (1971-09-01), Kronies
patent: 3665424 (1972-05-01), Scharkowitz
patent: 3676717 (1972-07-01), Lockwood
patent: 3914620 (1975-10-01), Millhollan et al.
patent: 3919566 (1975-11-01), Millhollan et al.
patent: 3973246 (1976-08-01), Millhollan et al.

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