Dual port memory effecting transfer of data between a serial reg

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365 78, 36518912, 36523009, G11C 1154

Patent

active

053253299

ABSTRACT:
A plurality of transfer bit lines each extend longitudinally across a memory array block. Transfer switch circuits are disposed between the transfer bit lines and a serial register. Transfer switch circuits are disposed between the transfer bit lines and a shared sense amplifier circuit. The transfer switch circuits are controlled by internal transfer signals, respectively. Transfer switch circuits are controlled by internal transfer signals, respectively.

REFERENCES:
patent: 4608666 (1986-08-01), Uchida
patent: 4947373 (1990-08-01), Yamaguchi et al.
patent: 4984214 (1991-01-01), Hiltebeitel et al.
patent: 5185724 (1993-02-01), Toda

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