Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1984-09-28
1986-12-30
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
365219, 365220, 365230, G11C 1300
Patent
active
046334416
ABSTRACT:
Dual port memory which enables consecutive access operations from an arbitrary address. The memory includes a memory array, a random access peripheral circuit for effecting random access to the array, a counter, a setting circuit for setting the counting state of the counter at an optional value, a selection circuit for consecutively selecting the array in response to the output of the counter, and a control circuit for advancing the state of the counter in response to a shift pulse.
REFERENCES:
patent: 4106109 (1978-08-01), Fassbender
patent: 4402067 (1983-08-01), Moss et al.
Fears Terrell W.
NEC
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