Dual poly integrated circuit interconnect

Details Dual poly integrated circuit interconnect Dual poly integrated circuit interconnect

1998-08-14

1999-07-13

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

3651851, G11C 1300, G11C 1140

Patent

active

059235845

ABSTRACT:
An electrical interconnect overlying a buried contact region of a substrate is characterized by a deposition of a first polycrystalline silicon layer and the patterning and etching of same to form a via. The via is formed in the first polycrystalline silicon layer to expose the substrate and a second polycrystalline silicon layer is formed in the via to contact the substrate. Portions of the second polycrystalline silicon layer overlying the first polycrystalline silicon layer are removed eliminating any horizontal interface between the two polycrystalline silicon layers. The first polycrystalline silicon layer remaining after the etch is then patterned to form an electrical interconnect.

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