Dual page memory system having storage elements which are select

Details Dual page memory system having storage elements which are select Dual page memory system having storage elements which are select

1984-09-17

1986-10-21

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, 365238, G11C 1300

Patent

active

046189467

ABSTRACT:
In a dual page memory system sharable by first and second processors, a plurality of storage elements are assigned to first and second pages accessible by the respective processor. An address decoder decodes addresses provided by either of the processors, and provides a selection signal corresponding to a predetermined storage element in each of the pages. A page selector couples the selection signal to the storage element in the page assigned to that processor. An access controller provides access to that processor to the storage element to which the selection is coupled. An assignment controller is provided to selectively swap corresponding storage elements between the pages.

REFERENCES:
patent: 4375678 (1983-03-01), Krebs

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