Electronic digital logic circuitry – With test facilitating feature
Reexamination Certificate
2005-08-23
2005-08-23
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
With test facilitating feature
C326S086000
Reexamination Certificate
active
06933743
ABSTRACT:
A dual mode, analog differential and complementary metal oxide semiconductor (CMOS) logic circuit is provided. The circuit includes a differential input for receiving a differential input signal. A switch pair is coupled to the differential input. A pair of load resistors coupled to the switch pair defines a differential output for providing a differential output signal. A current source is coupled to the switch pair. A control input receives a control signal and control circuitry coupled to the control input disable the current source to select a CMOS testing mode responsive to the control signal being activated.
REFERENCES:
patent: 6087879 (2000-07-01), Takahashi et al.
patent: 6337819 (2002-01-01), Shinozaki
Cecchi Delbert R.
Launsbach Michael
Preuss Curtis Walter
Siljenberg David W.
Cho James H.
International Business Machines - Corporation
Pennington Joan
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