Dual metal silicide scheme using a dual spacer process

Details Dual metal silicide scheme using a dual spacer process Dual metal silicide scheme using a dual spacer process

2006-01-19

2009-06-09

Smoot, Stephen W (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S592000, C438S664000, C257SE21438

Reexamination Certificate

active

07544575

ABSTRACT:
A semiconductor process and apparatus provide a polysilicon structure (10) and source/drain regions (12, 14) formed adjacent thereto in which a dual silicide scheme is used to form first silicide regions in the polysilicon, source and drain regions (30, 32, 34) using a first metal (e.g., cobalt). After forming sidewall spacers (40, 42), a second metal (e.g., nickel) is used to form second silicide regions in the polysilicon, source and drain regions (60, 62, 64) to reduce encroachment by the second silicide in the source/drain (62, 64) and to reduce resistance in the polysilicon structure caused by agglomeration and voiding from the first silicide (30).

REFERENCES:
patent: 6251779 (2001-06-01), Lu et al.
patent: 6391767 (2002-05-01), Huster et al.
patent: 6528402 (2003-03-01), Tseng
patent: 6987061 (2006-01-01), Mehrotra
patent: 7129548 (2006-10-01), Chan et al.
patent: 2002/0008295 (2002-01-01), Yang et al.
patent: 2006/0121662 (2006-06-01), Fang et al.

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