Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-11-29
2009-08-18
Tran, Minh-Loan T (Department: 2826)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C257SE21591
Reexamination Certificate
active
07576003
ABSTRACT:
A high tensile stress capping layer on Cu interconnects in order to reduce Cu transport and atomic voiding at the Cu/dielectric interface. The high tensile dielectric film is formed by depositing multiple layers of a thin dielectric material, each layer being under approximately 50 angstroms in thickness. Each dielectric layer is plasma treated prior to depositing each succeeding dielectric layer such that the dielectric cap has an internal tensile stress.
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Hon Wong Keith Kwong
Yang Chih-Chao
Yang Haining
International Business Machines - Corporation
Kuo W. Wendy
MacKinnon Ian D.
Tran Minh-Loan T
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