Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Ball or nail head type contact – lead – or bond
Reexamination Certificate
2000-07-24
2003-06-03
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Ball or nail head type contact, lead, or bond
C257S787000
Reexamination Certificate
active
06573611
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device in general. More particularly, the present invention relates to a dual-lead type substantially square semiconductor package, the size of which is reduced as compared with conventional one, and to a dual in-line memory module on both faces of which the size-reduced square packages are mounted, thereby realizing an increase in memory density of a standard memory module.
2. Description of the Prior Art
The major trend in the semiconductor industry today is to make products smaller, thinner, lighter, more integrated, and denser. This trend has been applied to a dual in-line memory module (DIMM) on both faces of which plural semiconductor packages are provided and attached. In particular, several electronic devices, such as notebook computers, personal digital assistants, server, work station, and the like, require improved memory modules of higher density more than ever.
The DIMM is standardized by international organization for semiconductor such as JEDEC (Joint Electron Device Engineering Council). For example, a standard DIMM of a 1250±6 mil×2660±6 mil size and a 150 mil maximum thickness is recommended to use eight TSOP (Thin Small Outline Packages) each of which has a 11.76±0.2 mm width, a 22.22±0.127 mm length, a 1.2 mm maximum thickness, a 0.8±0.05 mm pin pitch, and fifty-four pins.
In the standard memory module, the only way to increase the memory density by using current memory devices is to increase the number of packages to be mounted on the module. The packages to be added should be mounted near or stacked onto the already mounted packages, so that the size or thickness of the module is inevitably increased. However, since the size and thickness of the module are already standardized as stated above, it is actually impossible to add the conventional packages to the standard module.
SUMMARY OF THE INVENTION
The present invention is therefore directed to a substantially square semiconductor package having reduced length and pitch, and to a memory module having a higher density which substantially overcomes one or more of the problems due to the limitations and disadvantages of the related art.
It is therefore an object of the present invention to provide an improved memory module having a higher density without modifying the size of the memory module, and to provide an improved and smaller semiconductor package to be used for the improved memory module.
In a first aspect of the present invention, a semiconductor package is provided. The semiconductor package includes a substantially square package body that includes opposing first sides defining a body width and opposing second sides defining a body length. The semiconductor package also includes a semiconductor chip that includes a top surface and a plurality of bonding pads formed on the top surface thereof. The bonding pads are arranged parallel to the opposing second sides on a central region of the top surface, and the semiconductor chip is provided within the package body. The semiconductor package further includes a plurality of leads, each of which has inner and outer ends. The inner ends extend over the top surface of the semiconductor chip within the package body, and electrically connect to the bonding pads. The outer ends protrude from the package body along the opposing second sides. Preferably, a ratio of the body length to the body width ranges from 0.9 to 1.1.
In a second aspect of the present invention, another semiconductor package is provided. The semiconductor package includes a package body that includes opposing first sides having a first length and opposing second sides having a second length. The semiconductor package also includes a semiconductor chip that includes a top surface and a plurality of bonding pads formed on the top surface thereof. The bonding pads are arranged parallel to the opposing second sides on a central region of the top surface, and the semiconductor chip is provided within the package body. The semiconductor package further includes a plurality of leads, each of which has inner and outer leads. The inner leads extend over the top surface of the semiconductor chip within the package body, and electrically connect to the bonding pads. The outer leads protrude from the package body along the opposing second sides. In particular, the second length is longer than the first length and shorter than a distance from the outer leads at one of the second sides to the opposing outer leads at the other second side.
In another aspect of the present invention, a memory module is provided. The memory module includes a circuit substrate that includes upper and lower faces on each of which given circuit patterns are formed. The memory module also includes a plurality of semiconductor packages, each of which is provided according to either of the above aspects of the present invention. The packages are provided on the upper and lower faces, and electrically connected to the circuit patterns. In the memory modules, the packages on each face of the circuit substrate are arranged in at least two lengthwise rows and at least two widthwise rows.
These and other objects of the present invention will become more readily apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating the preferred embodiments of the invention, are given by way of illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
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Comprehensive Dictionary of Electrical Engineering 1999, CRC Press/IEEE Press, p. 363.
Jeon Jun Young
Sohn Hai Jeong
Song Young Hee
Andujar Leonardo
Flynn Nathan J.
Samsung Electronics Co,. Ltd.
Volentine & Francos, PLLC
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